Software Defined Radio System on Chip FPGA Prototype

Project number: 
22022
Sponsor: 
General Dynamics
Academic year: 
2021-2022
Modern technology is providing new functionality for data processing interactions between general purpose processors (GPPs), field programmable gate arrays (FPGAs) and radio frequency integrated circuits (RFICs). Systems on a chip (SOCs) open up the bottlenecks when GPPs and FPGAs are implemented into different integrated circuits. Software-defined radio (SDR) boards include RFIC radio frequency integrated circuits that reduce size, weight and power while improving performance.

This project involved prototyping FPGA software to evaluate the capabilities of the Rincon Raptor board. The team examined the types of processing performed in SDRs, developed an architecture to exploit the interfaces supported by the SOC and prototyped and evaluated an RFIC/FPGA/GPP implementation on SOC hardware.

The team developed signal processing functions in VHDL to find the limitations of the Raptor board’s data rate. Equipped with a Xilinx UltraScale SOC, featuring a combination of a traditional general-purpose processor and FPGA, the Raptor board acts as an ideal environment for development. This setup allows for quicker signal processing speed.

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